Some other error (which I am inquiring about in the sifive forums) is preventing me from moving forward with that version of the blinky demo. riscv-control-transfer-records Public This repo contains a RISC-V ISA extension (proposal) to allow recording of control transfer history to on-chip registers, to support usages associated with profiling and debug. Add reaction Like Unicorn Exploding Head Raised. I tried the blinky demo in the Freedom e SDK with no luck either. Therere three parts: riscv-gnu-toolchain installation qemu installation build xv6-riscv. I am trying to learn about rtos and risc-v. I am quite inexperienced with the FreedomStudio IDE, QEMU, and FreeRTOS. MainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 1, so i am expecting ‘blink’ to be printed periodically to the QEMU console window. When debugging the demo project, nothing is printed to the QEMU console window. I can see where the build/debug configuration would be off and I did my best to fix it. I am attempting to use RISC-V-Qemu-sifive_e-Eclipse-GCC demo project instead in the hopes that it will work since FreedomStudio is based off of Eclipse. I am following the tutorial for RTOS Demo for RISC-V QEMU sifive_e Model ( ) except the demo project specified in this tutorial is not included in the download zip. You can run it as follows (it compiles and runs on riscv32 and riscv64 assuming you have the. and QEMU v5.1.0 on OSX Catalina v10.15.7. Take a look at the Makefile and linker script.
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